CMLDM8120TG surface mount p-channel enhancement-mode silicon mosfet description: the central semiconductor CMLDM8120TG is an enhancement-mode p-channel field effect transistor, manufactured by the p-channel dmos process, designed for high speed pulsed amplifier and driver applications. this mosfet offers low r ds(on) and a max threshold voltage of 0.85v. marking code: ct8 sot-563 case maximum ratings: (t a =25c) symbol units drain-source voltage v ds 20 v gate-source voltage v gs 8.0 v continuous drain current (steady state) i d 860 ma continuous drain current, t5.0s i d 950 ma continuous source current (body diode) i s 360 ma maximum pulsed drain current, tp=10s i dm 4.0 a maximum pulsed source current, tp=10s i sm 4.0 a power dissipation (note 1) p d 350 mw power dissipation (note 2) p d 300 mw power dissipation (note 3) p d 150 mw operating and storage junction temperature t j , t stg -65 to +150 c thermal resistance ja 357 c/w electrical characteristics: (t a =25c unless otherwise noted) symbol test conditions min typ max units i gssf , i gssr v gs =8.0v, v ds =0 1.0 50 na i dss v ds =20v, v gs =0 5.0 500 na bv dss v gs =0, i d =250a 20 24 v v gs(th) v ds =v gs , i d =250a 0.45 0.85 v v sd v gs =0 i s =360ma 0.9 v r ds(on) v gs =4.5v, i d =0.95a 0.085 0.15 r ds(on) v gs =4.5v, i d =0.77a 0.085 0.142 r ds(on) v gs =2.5v, i d =0.67a 0.13 0.20 r ds(on) v gs =1.8v, i d =0.20a 0.19 0.24 r ds(on) v gs =1.2v, i d =0.10a 0.60 notes: (1) ceramic or aluminum core pc board with copper mounting pad area of 4.0mm 2 (2) fr-4 epoxy pc board with copper mounting pad area of 4.0mm 2 (3) fr-4 epoxy pc board with copper mounting pad area of 1.4mm 2 features: ? device is halogen free by design ? low r ds(on) ? max threshold voltage (0.85v) ? logic level compatibility applications: ? load/power switches ? power supply converter circuits ? battery powered portable equipment r2 (2-august 2011) www.centralsemi.com
CMLDM8120TG surface mount p-channel enhancement-mode silicon mosfet electrical characteristics - continued: (t a =25c unless otherwise noted) symbol test conditions min typ max units q g(tot) v ds =10v, v gs =4.5v, i d =1.0a 3.56 nc q gs v ds =10v, v gs =4.5v, i d =1.0a 0.36 nc q gd v ds =10v, v gs =4.5v, i d =1.0a 1.52 nc g fs v ds =10v, i d =0.81a 2.0 s c rss v ds =16v, v gs =0, f=1.0mhz 80 pf c iss v ds =16v, v gs =0, f=1.0mhz 200 pf c oss v ds =16v, v gs =0, f=1.0mhz 60 pf t on v dd =10v, v gs =4.5v, i d =0.95a, r g =6 20 ns t off v dd =10v, v gs =4.5v, i d =0.95a, r g =6 25 ns lead code: 1) drain 2) drain 3) gate 4) source 5) drain 6) drain marking code: ct8 sot-563 case - mechanical outline pin configuration www.centralsemi.com r2 (2-august 2011)
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